74AC11377 Datasheet | Texas Instruments

description These circuits are positive-edge-triggered D-type flip-flops with a clock enable input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if CLKEN is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the CLKEN input. The 74AC11377 is characterized for operation from - 40°C to 85°C. FUNCTION TABLE (each flip-flop) INPUTS OUTPUT CLKEN CLK D H X X Q0 L ↑H L ↑L X L X Q0 EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright © 1993, Texas Instruments Incorporated 2- 1 OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE SCAS101 - D3420, FEBRUARY 1990 - REVISED APRIL 1993 logic symbol† CLKEN CLK 1D 2D 3D 4D 5D 6D 7D 8D 24 13 23 22 21 20 17 16 15 14 G1 1C2 2D 1 1Q 2 2Q 3 3Q 4 4Q 9 5Q 10 6Q 11 7Q 12 8Q † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive...