74AC11620 Datasheet | Texas Instruments

description This octal bus transceiver is designed for asynchronous munication between data buses. The control function implementation allows for maximum flexibility in timing. DW OR NT PACKAGE (TOP VIEW) A1 A2 A3 A4 GND GND GND GND A5 A6 A7 A8 1 2 3 4 5 6 7 8 9 10 11 12 24 OEAB 23 B1 22 B2 21 B3 20 B4 19 VCC 18 VCC 17 B5 16 B6 15 B7 14 B8 13 OEBA These devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the output-enable (OEAB or OEBA) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives these devices the capability to store data by simultaneous enabling of OEAB and OEBA. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be plementary for the 74AC11620. The 74AC11620 is characterized for operation from - 40°C to 85°C. FUNCTION TABLE INPUTS OEBA OEAB OPERATION L L B data to A bus H H A data to B bus Isolation B data to A bus, A data to B bus EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright  1993, Texas Instruments Incorporated - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 - POST OFFICE BOX 1443 HOUSTON, TEXAS 77251- 1443 74AC11620 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS062A - JULY 1987 - REVISED APRIL 1993 logic symbol† logic diagram (positive logic) OEBA OEAB 13 24 1 A1 2 A2 3 A3 4 A4 9 A5 10 A6 11 A7 12...