Datasheet Summary
54AC16244, 74AC16244
16-BIT BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS120A
- MARCH 1990
- REVISED APRIL 1996
D Members of the Texas Instruments
Widebust Family
D 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
D Flow-Through Architecture Optimizes PCB
Layout
D Distributed VCC and GND Configuration
Minimizes High-Speed Switching Noise
D EPIC t (Enhanced-Performance Implanted
CMOS) 1-mm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages Using 25-mil Center-to-Center Pin Spacings, and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center...
