74AC16823
Description
These 18-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads.
Key Features
- 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads
- They are particularly suitable for implementing wider buffer registers, I/O ports, parity bus interfacing, and working registers
- The ’AC16823 can be used as two 9-bit flip-flops or one 18-bit flip-flop
- With the clock-enable (CLKEN) input low, the D-type flip-flops enter data on the low-to-high transitions of the clock
- Taking CLKEN high disables the clock buffer, thus latching the outputs
- Taking the clear (CLR) input low causes the Q outputs to go low independently of the clock
- WD PACKAGE 74AC16823
- In the high-impedance state, the outputs neither load nor drive the bus lines significantly
- OE does not affect the internal operation of the flip-flops
- Old data can be retained or new data can be entered while the outputs are in the high-impedance state
