Texas Instruments 74ACT11286
The 74ACT11286 universal 9-bit parity generator/checker features a local output for parity checking and a bus-driving parity I/O port for parity generation/checking. The word-length capability is easily expanded by cascading. The XMIT control input is implemented specifically to accommodate cascading.| Part No. | 74ACT11286 |
|---|---|
| Datasheet | 74ACT11286 Download |
| Manufacturer |  Texas Instruments |
| Description | 9-Bit Parity Generator/Checker |
| Buy | Stock & Price |
D Inputs Are TTL-Voltage Compatible D Generates Either Odd or Even Parity for Nine Data Lines D Cascadable for n-Bits Parity D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise D EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process D 500-mA Typical Latch-Up Immunity at 125°C D Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) 74ACT11286 9ĆBIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS SCAS069B − AUGUST 1988 − REVISED APRIL 1996 D OR N PACKAGE (TOP VIEW) B1 A2 PARITY I/O 3 GND 4 PARITY ERROR 5 XMIT 6 I7 14 C 13 D 12 E 11 VCC 10 F 9G 8H description When the XMIT is low, the parity tree is disabled and the PARITY ERROR output remains at a high logic level, regardless of the input levels. When XMIT is high, the parity tree is enabled. PARITY ERROR indicates a parity error when either an even number of inputs (A through I) are high and PARITY I/O is forced to a low logic level, or when an odd number of inputs are high and PARITY I/O is forced to a high logic level.
