Texas Instruments 74ACT11802
The 74ACT11802 contains three independent 4-input OR/NOR gates. They perform the Boolean functions in positive logic Y = A + B + C + D and Z = A + B + C + D. The 74ACT11802 is characterized for operation from – 40°C to 85°C.74ACT11802 TRIPLE 4-INPUT OR/NOR GATE
● Inputs Are TTL-Voltage Compatible
● Flow-Through Architecture Optimizes PCB Layout
● Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
● EPIC ™ (Enhanced-Performance Implanted CMOS) 1-µm Process
● 500-mA Typical Latch-Up Immunity at 125°C
● Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs description SCAS153A – D3594, JULY 1990 – REVISED APRIL 1993 DW OR NT PACKAGE (TOP VIEW) 1A 1Y 1Z 2Y GND GND GND GND 2Z 3Y 3Z 3D 1 2 3 4 5 6 7 8 9 10 11 12 24 1B 23 1C 22 1D 21 2A 20 2B 19 VCC 18 VCC 17 2C 16 2D 15 3A 14 3B 13 3C FUNCTION TABLE (each 4-input gate) INPUTS OUTPUTS ABCD Y Z HXXX H L XHXX H L XXHX H L XXXH H L LLLL L H logic symbol† 1 1A 24 1B 23 1C 22 1D 21 2A 20 2B 17 2C 16 2D 15 3A 14 3B 13 3C 12 3D ≥1 logic diagram, each section (positive logic) 2 1Y 3 1Z 4 2Y A B C D Y Z 9 2Z 10 3Y 11 3Z † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. EPIC is a trademark of Texas Instruments Incorporated.
● Inputs Are TTL-Voltage Compatible
● Flow-Through Architecture Optimizes PCB Layout
● Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
● EPIC ™ (Enhanced-Performance Implanted CMOS) 1-µm Process
● 500-mA Typical Latch-Up Immunity at 125°C
● Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs description SCAS153A – D3594, JULY 1990 – REVISED APRIL 1993 DW OR NT PACKAGE (TOP VIEW) 1A 1Y 1Z 2Y GND GND GND GND 2Z 3Y 3Z 3D 1 2 3 4 5 6 7 8 9 10 11 12 24 1B 23 1C 22 1D 21 2A 20 2B 19 VCC 18 VCC 17 2C 16 2D 15 3A 14 3B 13 3C FUNCTION TABLE (each 4-input gate) INPUTS OUTPUTS ABCD Y Z HXXX H L XHXX H L XXHX H L XXXH H L LLLL L H logic symbol† 1 1A 24 1B 23 1C 22 1D 21 2A 20 2B 17 2C 16 2D 15 3A 14 3B 13 3C 12 3D ≥1 logic diagram, each section (positive logic) 2 1Y 3 1Z 4 2Y A B C D Y Z 9 2Z 10 3Y 11 3Z † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. EPIC is a trademark of Texas Instruments Incorporated.