74ACT11828 Datasheet | Texas Instruments

ą - Inputs Are TTL-Voltage patible - 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers - Flow-Through Architecture to Optimize PCB Layout - Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise - EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process - 500-mA Typical Latch-Up Immunity at 125°C - Package Options Include Plastic Small- Outline Packages, Ceramic Chip Carriers, and Standard Ceramic 300-mil DIPs description These 10-bit buffers/bus drivers provide highperformance bus interface for wide data paths or buses carrying parity. The 3-state control gate is a 2-input NOR such that if either G1 or G2 is high, all ten outputs are in the...