74ACT16841 Datasheet | Texas Instruments

description These 20-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. 54ACT16841 . . . WD PACKAGE 74ACT16841 . . . DGG OR DL PACKAGE (TOP VIEW) 1OE 1 1Q1 2 1Q2 3 GND 4 1Q3 5 1Q4 6 VCC 7 1Q5 8 1Q6 9 1Q7 10 GND 11 1Q8 12 1Q9 13 1Q10 14 2Q1 15 2Q2 16 2Q3 17 GND 18 2Q4 19 2Q5 20 2Q6 21 VCC 22 2Q7 23 2Q8 24 GND 25 2Q9 26 2Q10 27 2OE 28 56 1LE 55 1D1 54 1D2 53 GND 52 1D3 51 1D4 50 VCC 49 1D5 48 1D6 47 1D7 46 GND 45 1D8 44 1D9 43 1D10 42 2D1 41 2D2 40 2D3 39 GND 38 2D4 37 2D5 36 2D6 35 VCC 34 2D7 33 2D8 32 GND 31 2D9 30 2D10 29 2LE The ’ACT16841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs. A buffered output-enable (1OE or 2OE) input can be used to place the outputs of the corresponding 10-bit latch in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. OE does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC and Widebus are trademarks of Texas Instruments Incorporated. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard...