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ADC08D500
www.ti.com
SNAS274F – MAY 2005 – REVISED APRIL 2013
ADC08D500 High Performance, Low Power, Dual 8-Bit, 500 MSPS A/D Converter
Check for Samples: ADC08D500
FEATURES
1
•2 Internal Sample-and-Hold • Single +1.9V ±0.1V Operation • Choice of SDR or DDR Output Clocking • Interleave Mode for 2x Sampling Rate • Multiple ADC Synchronization Capability • Ensured No Missing Codes • Serial Interface for Extended Control • Fine Adjustment of Input Full-Scale Range and
Offset • Duty Cycle Corrected Sample Clock
APPLICATIONS
• Direct RF Down Conversion • Digital Oscilloscopes • Satellite Set-Top Boxes • Communications Systems • Test Instrumentation
KEY SPECIFICATIONS
• Resolution 8 Bits • Max Conversion Rate 500 MSPS (min) • Bit Error Rate 10-18 (typ) • ENOB @ 250 MHz Input 7.
ADC08D500 Datasheet
