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ADC08DL502
www.ti.com
SNAS582B – MARCH 2012 – REVISED MARCH 2013
Low Power, 8-Bit, Dual 500 MSPS A/D Converter
Check for Samples: ADC08DL502
FEATURES
1
•2 Single +1.9V ±0.1V Operation • Duty Cycle Corrected Sample Clock
KEY SPECIFICATIONS
• Resolution: 8 Bits • Max Conversion Rate: 500 MSPS • Code Error Rate: 10−18 (typ) • ENOB @ 125 MHz Input: 7.5 Bits (typ) • DNL: ±0.15 LSB (typ) • Power Consumption
– Operating in 1:2 Demux Output: 1.25W (typ) – Power Down Mode: 3.3 mW (typ)
APPLICATIONS
• Satellite Modems • Digital Oscilloscopes • Direct RF Down Conversion • Communications Systems • Test Instrumentation
DESCRIPTION
The ADC08DL502 is a dual, low power, high performance, CMOS analog-to-digital converter.