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ADC16DV160
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SNAS488H – AUGUST 2009 – REVISED FEBRUARY 2013
ADC16DV160 Dual Channel, 16-Bit, 160 MSPS Analog-to-Digital Converter with DDR LVDS Outputs
Check for Samples: ADC16DV160
FEATURES
1
• Low Power Consumption • On-Chip Precision Reference and Sample-and-
Hold Circuit • On-Chip Automatic Calibration During Power-
Up • Dual Data Rate LVDS Output Port • Dual Supplies: 1.8V and 3.0V Operation • Selectable Input Range: 2.4 and 2.0 VPP • Sampling Edge Flipping with Clock Divider by
2 Option • Internal Clock Divide by 1 or 2 • On-Chip Low Jitter Duty-Cycle Stabilizer • Power-Down and Sleep Modes • Output Fixed Pattern Generation • Output Clock Position Adjustment • 3-Wire SPI • Offset Binary or 2's Complement Data Format • 68-Pin VQFN Package (10x10x0.8, 0.