ADS54T02 Datasheet | Texas Instruments

FEATURES - Dual Channel - 12-Bit Resolution - Maximum Clock Rate: 750 Msps - Low Swing Fullscale Input: 1.0 Vpp - Analog Input Buffer with High Impedance Input - Input Bandwidth (3d B): >1.2GHz - Data Output Interface: DDR LVDS - 196-Pin BGA Package (12x12mm) - Power Dissipation: 1050m W/ch - Performance at fin = 230 MHz IF - SNR: 60.7 d BFS - SFDR: 78 d Bc - Performance at fin = 700 MHz IF - SNR: 58.9 d BFS - SFDR: 73 d Bc - Receive Mode: 2x Decimation with Low Pass or High Pass Filter - Feedback Mode: Burst Mode Output for Full Bandwidth DPD Feedback APPLICATIONS - Telemunications Receiver - Power Amplifier Linearization DESCRIPTION The ADS54T02 is a high linearity dual channel 12-bit, 750 MSPS analog-to-digital converter (ADC) easing front end filter design for wide bandwidth receivers. The analog input buffer isolates the internal switching of the on-chip track-and-hold from disturbing the signal source as well as providing a high-impedance input. Two output modes are available for the output data - it can be decimated by two or the data can be output in burst mode. The burst mode output is designed specifically for DPD feedback applications where high resolution output data is available for a short period of time. Designed for high SFDR, the ADC has low-noise performance and outstanding spurious-free dynamic range over a large inputfrequency range. The device is available in a 196pin BGA package and is specified over the full industrial temperature range (- 40°C to 85°C). INA CLKIN SYNCIN Clk Buffer 12bit 750Msps 12bit 750Msps Digital Block Burst Mode 2x Decimation Digital Block Burst Mode 2x Decimation DA[11 :0] DACLK TRIGGER DB[11 :0] DBCLK Device Part No. ADS54T02 ADS54T01 ADS54T04 Number of Channels 2 1 2 Speed...