CBTLV16211 Datasheet | Texas Instruments

SN74CBTLV16211 LOWĆVOLTAGE 24ĆBIT FET BUS SWITCH D Member of the Texas Instruments Widebus Family D 5-Ω Switch Connection Between Two Ports D Rail-to-Rail Switching on Data I/O Ports D Ioff Supports Partial-Power-Down Mode Operation D Latch-Up Performance Exceeds 250 m A Per JESD 17 D ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) description/ordering information The SN74CBTLV16211 provides 24 bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The device is organized as dual 12-bit bus switches with separate output-enable (OE) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus switch is on, and port A is connected to port B. When OE is high, the switch is open, and the high-impedance state exists between the two ports. This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. SCDS043I - DECEMBER 1997 - REVISED OCTOBER 2003 DGG, DGV, OR DL PACKAGE (TOP VIEW) NC 1 1A1 2 1A2 3 1A3 4 1A4 5 1A5 6 1A6 7 GND 8 1A7 9 1A8 10 1A9 11 1A10 12 1A11 13 1A12 14 2A1 15 2A2 16 VCC 17 2A3 18 GND 19 2A4 20 2A5 21 2A6 22 2A7 23 2A8 24 2A9 25 2A10 26 2A11 27 2A12 28 56 1OE 55 2OE 54 1B1 53 1B2 52 1B3 51 1B4 50 1B5 49 GND 48 1B6 47 1B7 46 1B8 45 1B9 44 1B10 43 1B11 42 1B12 41 2B1 40 2B2 39 2B3 38 GND 37 2B4 36 2B5 35 2B6 34 2B7 33 2B8 32 2B9 31 2B10 30 2B11 29 2B12 - No internal connection ORDERING INFORMATION PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING - 40°C to 85°C SSOP - DL...