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CD54AC191 Datasheet Presettable Synchronous 4-Bit Binary Up/Down Counter

Manufacturer: Texas Instruments

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General Description

The CD54AC191 and CD54ACT191 are asynchronously presettable binary up/down synchronous counters that utilize Advanced CMOS Logic technology.

Presetting the counter to the number on preset data inputs (P0-P3) is accomplished by setting LOW the asynchronous parallel load input (PL).

Counting occurs when PL is HIGH, Count Enable (CE) is LOW, and the Up/Down (U/D) input is either LOW for upcounting or HIGH for down-counting.

Overview

CD54AC191, CD54ACT191 Data sheet acquired from Harris Semiconductor SCHS243A October 1998 - Revised May 2000 Presettable Synchronous 4-Bit Binary Up/Down.

Key Features

  • Buffered Inputs.
  • Typical Propagation Delay - 12.8ns at VCC = 5V, TA = 25oC, CL = 50pF.
  • Exceeds 2kV ESD Protection MIL-STD-883, Method 3015.
  • SCR-Latchup-Resistant CMOS Process and Circuit Design.
  • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption.
  • Balanced Propagation Delays.
  • AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply.
  • ±24mA Output Drive Current - Fanout to 1.

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