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CD54HC161 - High-Speed CMOS Logic Presettable Counters

Datasheet Summary

Description

Two count enables, PE and TE, in each counter are provided for n-bit cascading.

In all counters reset action occurs regardless of the level of the SPE, PE and TE inputs (and the clock input, CP, in the ’HC161 and ’HCT161 types).

Features

  • ’HC161, ’HCT161 4-Bit Binary Counter, Asynchronous Reset.
  • ’HC163, ’HCT163 4-Bit Binary Counter, Synchronous Reset.
  • Synchronous Counting and Loading.
  • Two Count Enable Inputs for n-Bit Cascading.
  • Look-Ahead Carry for High-Speed Counting.
  • Fanout (Over Temperature Range) - Standard Outputs.
  • 10 LSTTL Loads - Bus Driver Outputs.
  • . . . 15 LSTTL Loads.
  • Wide Operating Temperature Range . . . -55oC t.

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Datasheet preview – CD54HC161

Datasheet Details

Part number CD54HC161
Manufacturer Texas Instruments
File Size 501.00 KB
Description High-Speed CMOS Logic Presettable Counters
Datasheet download datasheet CD54HC161 Datasheet
Additional preview pages of the CD54HC161 datasheet.

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Full PDF Text Transcription

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The CD54HCT161 is obsolete and no longer is supplied. Data sheet acquired from Harris Semiconductor SCHS154D February 1998 - Revised October 2003 CD54/74HC161, CD54/74HCT161, CD54/74HC163, CD54/74HCT163 High-Speed CMOS Logic Presettable Counters [ /Title (CD74 HC161 , CD74 HCT16 1, CD74 HC163 , CD74 HCT16 3) /Subject (High Speed CMOS Logic Presettable Counte rs) /Autho r () /Keywords (High Speed CMOS Logic Presettable Counte rs, High Speed Features • ’HC161, ’HCT161 4-Bit Binary Counter, Asynchronous Reset • ’HC163, ’HCT163 4-Bit Binary Counter, Synchronous Reset • Synchronous Counting and Loading • Two Count Enable Inputs for n-Bit Cascading • Look-Ahead Carry for High-Speed Counting • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . .
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