CD54HC4520
Features
- Positive or Negative Edge Triggering
- Synchronous Internal Carry Propagation
- Fanout (Over Temperature Range)
- Standard Outputs
- -
- 10 LSTTL Loads
- Bus Driver Outputs
- - . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . -55o C to 125o C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction pared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic patibility, VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input patibility, Il ≤ 1µA at VOL, VOH having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negativegoing transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3 to the ENABLE input of the subsequent counter while the CLOCK input of the...
