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CD54HCT138 - High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Inverting/Noninverting

This page provides the datasheet information for the CD54HCT138, a member of the CD54HC138 High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Inverting/Noninverting family.

Datasheet Summary

Description

The CDx4HC(T)138 and '238 are three to eight decoders with one standard output strobe (G2) and two active low output strobes (G 1 and G 0).

When the outputs are gated by any of the strobe inputs, they are all forced into the high state.

Features

  • Select one of eight data outputs:.
  • Active low for '138.
  • Active high for '238.
  • l/O port or memory selector.
  • Three enable inputs to simplify cascading.
  • Typical propagation delay of 13 ns at VCC = 5 V, CL = 15 pF, TA = 25°C.
  • Fanout (over temperature range).
  • Bus driver outputs: 15 LSTTL loads.
  • Standard outputs: 10 LSTTL loads.
  • Wide operating temp range: -55°C to 125°C.
  • Balanced propagation delay and t.

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Datasheet preview – CD54HCT138

Datasheet Details

Part number CD54HCT138
Manufacturer Texas Instruments
File Size 1.28 MB
Description High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Inverting/Noninverting
Datasheet download datasheet CD54HCT138 Datasheet
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Full PDF Text Transcription

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CD54HC138, CD74HC138, CD54HCT138, CD74HCT138, CD54HC238, CD74HC238, CD54HCT238, CD74HCT238 SCHS147J – NOVEMBER 1998 – REVISED NOVEMBER 2021 CDx4HC138, CDx4HCT138, CDx4HC238, CDx4HCT238 High-Speed CMOS Logic 3- to 8-Line Decoder/Demultiplexer Inverting and Noninverting 1 Features • Select one of eight data outputs: – Active low for '138 – Active high for '238 • l/O port or memory selector • Three enable inputs to simplify cascading • Typical propagation delay of 13 ns at VCC = 5 V, CL = 15 pF, T
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