Datasheet4U Logo Datasheet4U.com

CD54HCT20F - Dual 4-Input NAND Gates

Download the CD54HCT20F datasheet PDF. This datasheet also covers the CD54HCT20 variant, as both devices belong to the same dual 4-input nand gates family and are provided as variant models within a single manufacturer datasheet.

General Description

LSTTL input logic compatible VIL(max) = 0.8 V, VIH(min) = 2 V CMOS input logic compatible II ≤ 1 µA at VOL, VOH Buffered inputs 4.5 V to 5.5 V operation Wide operating temperature range: -55°C to +125°C Supports fanout

Key Features

  • 3.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CD54HCT20-etcTI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
CD54 Ind / Wirewound Sumida
CD54-390LB Ind / Wirewound Sumida
CD54-390LC Ind / Wirewound Sumida
CD54-470L 200 mA/ PFM Step-Up Micropower Switching Regulator ON Semiconductor
CD54-470L 200 mA/ PFM Step-Up Micropower Switching Regulator ON

Other Datasheets by Texas Instruments

Part Number Description
CD54HCT20 Dual 4-Input NAND Gates
CD54HCT238 High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Inverting/Noninverting
CD54HCT238F High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Inverting/Noninverting
CD54HCT240 High-Speed CMOS Logic Octal Buffer/Line Drivers
CD54HCT241 High-Speed CMOS Logic Octal Buffer/Line Drivers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CDx4HCT20 Dual 4-Input NAND Gates CD74HCT20, CD54HCT20 SCHS417 – JUNE 2020 1 Features 3 Description • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 µA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications This device contains two independent 4-input NAND gates. Each gate performs the Boolean function Y = A ● B ● C ● D in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) CD74HCT20M SOIC (14) 8.70 mm × 3.90 mm CD74HCT20E PDIP (14) 19.30 mm × 6.40 mm CD54HCT20F CDIP (14) 21.30 mm × 7.