CD54HCT30F3A Datasheet | Texas Instruments

Features Description - Buffered Inputs - Typical Propagation Delay: CL = 15p F, TA = 25o C 10ns at = 5V, - Fanout (Over Temperature Range) - Standard Outputs - - - 10 LSTTL Loads - Bus Driver Outputs - - . . . 15 LSTTL Loads - Wide Operating Temperature Range . . . -55o C to 125o C The ’HC30 and ’HCT30 each contain an 8-input NAND gate in one package. They provide the system designer with the direct implementation of the positive logic 8-input NAND function. Logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The HCT logic family is functionally pin patible with the standard LS logic family. - Balanced Propagation Delay and Transition Times - Significant Power Reduction pared to LSTTL Logic ICs - HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V - HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic patibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input patibility, Il ≤ 1µA at VOL, VOH Ordering Information PART NUMBER CD54HC30F3A CD54HCT30F3A CD74HC30E CD74HC30M CD74HC30MT CD74HC30M96 CD74HC30NSR TEMP. RANGE (o C) PACKAGE -55 to 125 14 Ld CERDIP -55 to 125 14 Ld CERDIP -55 to 125 14 Ld PDIP -55 to 125 14 Ld SOIC -55 to 125 14 Ld SOIC -55 to 125 14 Ld SOIC -55 to 125 14 Ld SOP Pinout CD54HC30, CD54HCT30 (CERDIP) CD74HC30 (PDIP, SOIC, SOP, TSSOP) CD74HCT30 (PDIP, SOIC) TOP VIEW CD74HC30PW CD74HC30PWR CD74HC30PWT...