CD74AC280 Datasheet | Texas Instruments

Features - Buffered Inputs - Typical Propagation Delay - 10ns at VCC = 5V, TA = 25o C, CL = 50p F - Exceeds 2k V ESD Protection per MIL-STD-883, Method 3015 - SCR-Latchup-Resistant CMOS Process and Circuit Design - Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption - Balanced Propagation Delays - AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply - ±24m A Output Drive Current - Fanout to 15 FAST™ ICs - Drives 50Ω Transmission Lines Description The ’AC280 and ’ACT280 are 9-bit odd/even parity generator/checkers that utilize Advanced CMOS Logic technology. Both even and odd parity outputs are available for checking or generating parity for words up to nine bits long. Even parity is indicated (∑E output is HIGH) when an even number of data inputs is HIGH. Odd parity is indicated (∑O output is HIGH) when an odd number of data inputs is HIGH. Parity checking for words larger than nine bits can be acplished by tying the ∑E output to any input of an additional ’AC280, ’ACT280 parity checker. Ordering Information PART NUMBER TEMP. RANGE (o C) PACKAGE CD54AC280F3A CD74AC280E CD74AC280M -55 to 125 0 to 70o C, -40 to 85, -55 to 125 0 to 70o C, -40 to 85, -55 to 125 14 Ld CERDIP 14 Ld PDIP 14 Ld SOIC CD54ACT280F3A CD74ACT280E CD74ACT280M -55 to 125 0 to 70o C, -40 to 85, -55 to 125 0 to 70o C, -40 to 85, -55 to 125 14 Ld CERDIP 14 Ld PDIP 14 Ld SOIC NOTES: 1. When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel. 2. Wafer and die for this part number is available which meets all electrical specifications. Please contact your local TI sales office or customer service for ordering information. Pinout CD54AC280, CD54ACT280 (CERDIP) CD74AC280, CD74ACT280 (PDIP, SOIC) TOP VIEW I6 1 I7 2 NC 3 I8 4 ∑E 5 ∑O 6 GND...