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CD74AC534 - Octal D-Type Flip-Flops

Download the CD74AC534 datasheet PDF. This datasheet also covers the CD74AC374 variant, as both devices belong to the same octal d-type flip-flops family and are provided as variant models within a single manufacturer datasheet.

General Description

The eight flip-flops of the ’AC374 devices are D-type edge-triggered flip-flops.

On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

Key Features

  • SCR-Latch-up-resistant CMOS process and circuit design.
  • Speed of bipolar FAST.
  • /AS/S with significantly reduced power consumption.
  • Balanced propagation delays.
  • AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply.
  • ± 24mA output drive current.
  • Fanout to 15 FAST.
  • ICs.
  • Drives 50ohm transmission lines.
  • 2.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CD74AC374-etcTI.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription for CD74AC534 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for CD74AC534. For precise diagrams, and layout, please refer to the original PDF.

CD74AC374, CD54AC374, CD54ACT374, CD74ACT374, CD74AC534 SCHS290A – DECEMBER 1998 – REVISED MARCH 2024 CDx4AC374, CDx4ACT374, CD74AC534 Octal D-Type Flip-Flops, 3-State Po...

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4 CDx4AC374, CDx4ACT374, CD74AC534 Octal D-Type Flip-Flops, 3-State PositiveEdge Triggered 1 Features • SCR-Latch-up-resistant CMOS process and circuit design • Speed of bipolar FAST*/AS/S with significantly reduced power consumption • Balanced propagation delays • AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply • ± 24mA output drive current – Fanout to 15 FAST* ICs – Drives 50ohm transmission lines * 2 Description The eight flip-flops of the ’AC374 devices are D-type edge-triggered flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic l

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