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D Inputs Are TTL-Voltage Compatible D Contains Four Flip-Flops With Double-Rail
Outputs
D Buffered Inputs D Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
D Balanced Propagation Delays D ±24-mA Output Drive Current
– Fanout to 15 F Devices
D SCR-Latchup-Resistant CMOS Process and
Circuit Design
D Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
D Applications Include:
– Buffer/Storage Registers
– Shift Registers
– Pattern Generators
CD74ACT175 QUADRUPLE D-TYPE FLIP-FLOP
WITH CLEAR
SCHS345 – APRIL 2003
E OR M PACKAGE (TOP VIEW)
CLR 1 1Q 2 1Q 3 1D 4 2D 5 2Q 6 2Q 7
GND 8
16 VCC 15 4Q 14 4Q 13 4D 12 3D 11 3Q 10 3Q 9 CLK
description/ordering information
This positive-edge-triggered D-type flip-flop has a direct clear (CLR) input.
CD74ACT175 Datasheet
