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CD74ACT238 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
D Designed Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
D Incorporates Three Enable Inputs to
Simplify Cascading and/or Data Reception
D Balanced Propagation Delays D ±24-mA Output Drive Current
– Fanout to 15 F Devices
D SCR-Latchup-Resistant CMOS Process and
Circuit Design
D Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
SCHS330 –FEBRUARY 2003
E PACKAGE (TOP VIEW)
A1 B2 C3 G2A 4 G2B 5 G1 6 Y7 7 GND 8
16 VCC 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6
description/ordering information
The CD74ACT238 decoder/demultiplexer is designed for high-performance memory-decoding and data-routing ap