CD74ACT74 Datasheet | Texas Instruments

iption/ordering information The ’ACT74 dual positive-edge-triggered devices are D-type flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. ORDERING INFORMATION PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP - E Tube CD74ACT74E CD74ACT74E - 55°C to 125°C SOIC - M Tube CD74ACT74M Tape and reel CD74ACT74M96 ACT74M CDIP - F Tube CD54ACT74F3A CD54ACT74F3A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at .ti./sc/package. FUNCTION TABLE (each flip-flop) INPUTS OUTPUTS PRE CLR CLK D Q Q LHXXHL HLXXLH L L X X H†...