CD74HC08-EP Datasheet | Texas Instruments

CD74HC08ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES D Controlled Baseline - One Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of Up To - 55°C to 125°C D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D Buffered Inputs D Typical Propagation Delay 7 ns at VCC = 5 V, CL = 15 p F, TA = 25°C D Fanout (Over Temperature Range) - Standard Outputs . . . 10 LSTTL Loads - Bus Driver Outputs . . . 15 LSTTL Loads † ponent qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold pound life. Such qualification testing should not be viewed as justifying use of this ponent beyond specified performance and environmental limits. SCLS477B - APRIL 2003 - REVISED APRIL 2004 D Balanced Propagation Delay and Transition Times D Significant Power Reduction pared to LSTTL Logic ICs D 2-V to 6-V VCC Operation D High Noise Immunity NIL or NIH = 30% of VCC at VCC = 5 V D CMOS Input patibility, Il ≤ 1 µA at VOL, M PACKAGE (TOP VIEW) 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y description/ordering information The CD74HC08 logic gates utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL gates, with the low power consumption of standard CMOS integrated circuits. All devices can drive 10 LSTTL loads. ORDERING INFORMATION PACKAGE‡ ORDERABLE PART...