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Data sheet acquired from Harris Semiconductor SCHS144C
November 1997 - Revised September 2003
CD54HC126, CD74HC126, CD54HCT126, CD74HCT126
High-Speed CMOS Logic Quad Buffer, Three-State
[ /Title (CD74 HC126 , CD74 HCT12 6) /Subject (High Speed CMOS Logic Quad Buffer, ThreeState)
Features
Description
• Three-State Outputs • Separate Output Enable Inputs
• Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types - 4.