CD74HC367M96 Datasheet | Texas Instruments

Features - Buffered inputs - High current bus driver outputs - Two independent three-state enable controls - Typical propagation delay t PLH, t PHL = 8 ns at VCC = 5 V, CL =15 p F, TA = 25℃ - Fanout (over temperature range) - Standard outputs: 10 LSTTL Loads - Bus driver outputs: 15 LSTTL Loads - Wide operating temperature range: -55℃ to 125℃ - Balanced propagation delay and transition times - Significant power reduction pared to LSTTL Logic ICs - HC Types - 2 V to 6 V operation - High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5 V - HCT Types - 4.5 V to 5.5 V operation - Direct LSTTL input logic patibility, VIL = 0.8 V (Max), VIH = 2 V (Min) - CMOS input patibility, II ≤ 1 μA at VOL, VOH 1 1OE 2 Description The ’HC367, ’HCT367, ’HC368, and CD74HCT368 silicon gate CMOS three-state buffers are general purpose high-speed non-inverting and inverting buffers. The ’HC367 and ’HCT367 are non-inverting buffers, whereas the ’HC368 and CD74HCT368 are inverting buffers. They have high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits possess the low power dissipation of CMOS circuitry, yet have speeds parable to low power Schottky TTL circuits. Both circuits are capable of driving up to 15 low power Schottky inputs. PART NUMBER Device Information PACKAGE(1) BODY SIZE (NOM) CD74HC367M SOIC (16) 9.90 mm × 3.90 mm CD74HC368M SOIC (16) 9.90 mm × 3.90 mm CD74HCT367M SOIC (16) 9.90 mm × 3.90 mm CD74HCT368M SOIC (16) 9.90 mm × 3.90 mm CD74HC367E PDIP (16) 19.31 mm × 6.35 mm CD74HC368E PDIP (16) 19.31 mm × 6.35 mm CD74HCT367E PDIP (16) 19.31 mm × 6.35...