Datasheet Summary
CD54HC4015, CD74HC4015
Data sheet acquired from Harris Semiconductor SCHS198C
November 1997
- Revised May 2003
High Speed CMOS Logic Dual 4-Stage Static Shift Register
[ /Title (CD74 HC401 5) /Subject (High Speed CMOS Logic Dual 4-
Features
Description
- Maximum Frequency, Typically 60MHz CL = 15pF, VCC = 5V, TA = 25oC
- Positive-Edge Clocking
- Overriding Reset
- Buffered Inputs and Outputs
- Fanout (Over Temperature Range)
- Standard Outputs
- -
- 10 LSTTL Loads
- Bus Driver Outputs
- - . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . -55oC to 125oC
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction...