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CD54HC4059, CD74HC4059
Data sheet acquired from Harris Semiconductor SCHS206B
February 1998 - Revised May 2003
High-Speed CMOS Logic CMOS Programmable Divide-by-N Counter
[ /Title (CD74 HC4059 ) /Subject (HighSpeed CMOS Logic CMOS Pro-
Features
Description
• Synchronous Programmable ÷N Counter N = 3 to 9999 or 15999
• Presettable Down-Counter
• Fully Static Operation
• Mode-Select Control of Initial Decade Counting Function (÷10, 8, 5, 4, 2)
• Master Preset Initialization
• Latchable ÷N Output
• Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . .