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CDCE18005 - Five/Ten Output Clock Programmable Buffer

General Description

The CDCE18005 is a high performance clock distributor featuring a high degree of configurability via a SPI interface, and programmable start up modes determined by on-chip EEPROM.

Key Features

  • 1.
  • Universal Input Buffers That Accept LVPECL, LVDS, or LVCMOS Level Signaling.
  • Fully Configurable Outputs Including Frequency, Output Format, and Output Skew.
  • Output Multiplexer That Serves as a Clock Switch Between the Three Reference Inputs and the Outputs.
  • Clock Generation Via AT-Cut Crystal.
  • Integrated EEPROM Determines Device Configuration at Power-up.
  • Low Additive Jitter Performance.
  • Universal Output Blocks Support up to 5 Dif.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.ti.com CDCE18005 SCAS863B – NOVEMBER 2008 – REVISED NOVEMBER 2012 Five/Ten Output Clock Programmable Buffer Check for Samples: CDCE18005 FEATURES 1 • Universal Input Buffers That Accept LVPECL, LVDS, or LVCMOS Level Signaling • Fully Configurable Outputs Including Frequency, Output Format, and Output Skew • Output Multiplexer That Serves as a Clock Switch Between the Three Reference Inputs and the Outputs • Clock Generation Via AT-Cut Crystal • Integrated EEPROM Determines Device Configuration at Power-up • Low Additive Jitter Performance • Universal Output Blocks Support up to 5 Differential, 10 Single-ended, or Combinations of Differential or Single-ended: – Low Additive Jitter – Output Frequency up to 1.