CDCE18005 Description
The CDCE18005 is a high performance clock distributor featuring a high degree of configurability via a SPI interface, and programmable start up modes determined by on-chip EEPROM. Specifically tailored for buffering clocks for data converters and high-speed digital signals, the CDCE18005 achieves low additive jitter in the 50 fs RMS (1) range. The clock distribution block includes five individually programmable...
CDCE18005 Key Features
- Universal Input Buffers That Accept LVPECL, LVDS, or LVCMOS Level Signaling
- Fully Configurable Outputs Including Frequency, Output Format, and Output Skew
- Output Multiplexer That Serves as a Clock Switch Between the Three Reference Inputs and the Outputs
- Clock Generation Via AT-Cut Crystal
- Integrated EEPROM Determines Device
- Low Additive Jitter Performance
- Universal Output Blocks Support up to 5
- Low Additive Jitter
- Output Frequency up to 1.5 GHz
- LVPECL, LVDS, LVCMOS, and Special High