CDCEL824 Datasheet | Texas Instruments

Features - 1 Flexible Clock Driver - Three User-Definable Control Inputs [S0/S1/S2]: for example, Frequency Switching, Output Enable, or Power Down - Enables 0-PPM Clock Generation - In-System Programmability and EEPROM - Serial Programmable Volatile Register - Nonvolatile EEPROM to Store Customer Settings - Flexible Input Clocking Concept - External Crystal: 20 MHz to 30 MHz - Single-Ended LVCMOS up to 130 MHz - Selectable Output Frequency up to 201 MHz - Low-Noise PLL Core - PLL Loop Filter ponents Integrated - Low Period Jitter (Typical 80 ps) - 1.8-V Device Power Supply - Temperature Range - 40°C to 85°C - Packaged in TSSOP 2 Applications Laser Distance Measurement Applications 3 Description The CDCEL824 is a modular PLL-based low-cost, high-performance, programmable clock synthesizer, multiplier, and divider. It generates up to four output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 201 MHz, using up to two independent configurable PLLs. The CDCEL824 has a separate output supply pins, VDDOUT, which are 1.8 V. The input accepts an external crystal or LVCMOS clock signal. In case of a crystal input, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 p F to 20 p F. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TSSOP (16) 5.00 mm x 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Schematic Ethernet PHY Wi Fi USB Controller 25 MHz FPGA An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION...