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CY74FCT162823T - 18-Bit Registers

This page provides the datasheet information for the CY74FCT162823T, a member of the CY74FCT16823T 18-Bit Registers family.

Datasheet Summary

Description

The CY74FCT16823T and the CY74FCT162823T 18-bit bus interface registers are designed for use in high-speed, low-power systems needing wide registers and parity.

18-bit operation is achieved by connecting the control lines of the two 9-bit registers.

Features

  • Ioff supports partial-power-down mode operation.
  • Edge-rate control circuitry for significantly improved noise characteristics.
  • Typical output skew < 250 ps.
  • ESD > 2000V.
  • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages.
  • Industrial temperature range of.
  • 40˚C to +85˚C.
  • VCC = 5V ± 10% CY74FCT16823T Features:.
  • 64 mA sink current, 32 mA source current.
  • Typical VOLP (ground bounce).

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Full PDF Text Transcription

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Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT16823T CY74FCT162823T SCCS062B - August 1994 - Revised September 2001 Features • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temperature range of −40˚C to +85˚C • VCC = 5V ± 10% CY74FCT16823T Features: • 64 mA sink current, 32 mA source current • Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25˚C CY74FCT162823T Features: • Balanced 24 mA output drivers • Reduced system switching noise • Typical VOLP (ground bounce) <0.
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