CY74FCT2573T Datasheet | Texas Instruments

description The CY74FCT2573T is an 8-bit, high-speed CMOS, TTL-patible buffered latch with 3-state outputs that is ideal for driving high-capacitance loads, such as memory and address buffers. On-chip 25-Ω termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2573T can replace the CY74FCT573T to reduce noise in an existing design. When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE) input is low. When OE is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION PACKAGE† SPEED (ns) ORDERABLE PART NUMBER TOP-SIDE MARKING QSOP - Q Tape and reel CY74FCT2573CTQCT FCT2573C Tube 4.7 CY74FCT2573CTSOC SOIC - SO FCT2573C Tape and reel 4.7 CY74FCT2573CTSOCT - 40°C to 85°C QSOP - Q Tape and reel 5.2 CY74FCT2573ATQCT FCT2573A Tube 8 CY74FCT2573TSOC SOIC - SO FCT2573 Tape and reel 8 CY74FCT2573TSOCT † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at .ti./sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright  2001, Texas Instruments...