CY74FCT543T Datasheet | Texas Instruments

D Function, Pinout, and Drive patible With FCT and F Logic D Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions D Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics D Ioff Supports Partial-Power-Down Mode Operation D Matched Rise and Fall Times D Fully patible With TTL Input and Output Logic Levels D 3-State Outputs D ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) D Separation Controls for Data Flow in Each Direction D Back-to-Back Latches for Storage D CY54FCT543T - 48-m A Output Sink Current - 12-m A Output Source Current D CY74FCT543T - 64-m A Output Sink Current - 32-m A Output Source Current CY54FCT543T, CY74FCT543T 8-BIT LATCHED REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCCS030A - MAY 1994 - REVISED OCTOBER 2001 CY54FCT543T . . . D PACKAGE CY74FCT543T . . . Q OR SO PACKAGE (TOP...