CY74FCT825T Datasheet | Texas Instruments

D Function, Pinout, and Drive patible With FCT, F Logic, and AM29825 D Reduced VOH (Typically = 3.3 V) Version of Equivalent FCT Functions D Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics D Ioff Supports Partial-Power-Down Mode Operation D Matched Rise and Fall Times D Fully patible With TTL Input and Output Logic Levels D ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) D 64-m A Output Sink Current 32-m A Output Source Current D High-Speed Parallel Register With Positive-Edge-Triggered D-Type Flip-Flops D Buffered mon Clock-Enable (EN) and Asynchronous-Clear (CLR) Inputs D 3-State Outputs CY74FCT825T 8-BIT BUS-INTERFACE REGISTER WITH 3-STATE OUTPUTS SCCS070A - OCTOBER 2001 - REVISED NOVEMBER 2001 Q PACKAGE (TOP VIEW) OE1 OE2 D0 D1 D2 D3 D4 D5 D6 D7...