DP83640TVV Datasheet | Texas Instruments

Overview 1.1 Features - IEEE 1588 V1 and V2 Supported - UDP/IPv4, UDP/IPv6, and Layer2 Ethernet Packets Supported - IEEE 1588 Clock Synchronization - Timestamp Resolution of 8 ns - Allows Sub 10-ns Synchronization to Master Reference - 12 IEEE 1588 GPIOs for Trigger or Capture - Deterministic, Low Transmit and Receive Latency - Selectable Frequency Synchronized Clock Output - Dynamic Link Quality Monitoring - TDR Based Cable Diagnostic and Cable Length Detection - 10/100 Mb/s Packet BIST (Built-in Self Test) - Error-Free Operation up to 150 Meters CAT5 Cable - ESD Protection - 8 k V Human Body Model - 2.5-V and 3.3-V I/Os and MAC Interface - Auto-MDIX for 10/100 Mbps - RMII Rev. 1.2 and MII MAC Interface - 25-MHz MDC and MDIO Serial Management Interface - IEEE 802.3 100BASE-FX Fiber Interface - IEEE 1149.1 JTAG - Programmable LED Support for Link, 10/100 Mb/s Mode, Duplex, Activity, and Collision Detect - Optional 100BASE-TX Fast Link-loss Detection - Industrial Temperature Range - 48-pin LQFP Package (7 mm × 7 mm) 1.2 Applications - Factory Automation - Ethernet/IP - CIP Sync - Test and Measurement - LXI Standard -...