DRV8353
Features
- 1 9 to 100-V, Triple half-bridge gate driver
- Optional integrated buck regulator
- Optional triple low-side current shunt amplifiers
- Smart gate drive architecture
- Adjustable slew rate control for EMI performance
- VGS handshake and minimum dead-time insertion to prevent shoot-through
- 50-m A to 1-A peak source current
- 100-m A to 2-A peak sink current
- d V/dt mitigation through strong pulldown
- Integrated gate driver power supplies
- High-side doubler charge pump For 100% PWM duty cycle control
- Low-side linear regulator
- Integrated LM5008A buck regulator
- 6 to 95-V operating voltage range
- 2.5 to 75-V, 350-m A output capability
- Integrated triple current shunt amplifiers
- Adjustable gain (5, 10, 20, 40 V/V)
- Bidirectional or unidirectional support
- 6x, 3x, 1x, and independent PWM modes
- Supports 120° sensored operation
- SPI or hardware interface available
- Low-power sleep mode (20 µA at VVM = 48-V)
- Integrated protection features
- VM undervoltage lockout...
