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DS32ELX0421 - FPGA-Link Serializer

Download the DS32ELX0421 datasheet PDF. This datasheet also covers the DS32EL0421 variant, as both devices belong to the same fpga-link serializer family and are provided as variant models within a single manufacturer datasheet.

General Description

The DS32EL0421/DS32ELX0421 is a 125 MHz to 312.5 MHz (DDR) serializer for high-speed serial transmission over FR-4 printed circuit board backplanes, balanced cables, and optical fiber.

Key Features

  • 1.
  • 2 5-bit DDR LVDS Parallel Data Interface.
  • Programmable Transmit De-emphasis.
  • Configurable Output Levels (VOD).
  • Selectable DC-balanced Encoder.
  • Selectable Data Scrambler.
  • Remote Sense for Automatic Detection and Negotiation of Link Status.
  • On Chip LC VCOs.
  • Redundant Serial Output (ELX device only).
  • Data Valid Signaling to Assist with Synchronization of Multiple Receivers.
  • Supports AC- and DC-coupled Signal.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DS32EL0421-etcTI.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DS32EL0421, DS32ELX0421 www.ti.com SNLS282F – MAY 2008 – REVISED APRIL 2013 DS32EL0421 , DS32ELX0421 125 - 312.5 MHz FPGA-Link Serializer with DDR LVDS Parallel Interface Check for Samples: DS32EL0421, DS32ELX0421 FEATURES 1 •2 5-bit DDR LVDS Parallel Data Interface • Programmable Transmit De-emphasis • Configurable Output Levels (VOD) • Selectable DC-balanced Encoder • Selectable Data Scrambler • Remote Sense for Automatic Detection and Negotiation of Link Status • On Chip LC VCOs • Redundant Serial Output (ELX device only) • Data Valid Signaling to Assist with Synchronization of Multiple Receivers • Supports AC- and DC-coupled Signaling • Integrated CML and LVDS Terminations • Configurable PLL Loop Bandwidth • Programmable Output Termination (50Ω or 75Ω).