Datasheet4U Logo Datasheet4U.com

DS90CR583 - LVDS

Description

The DS90CR583 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams.

A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link.

Features

  • 1.
  • 2 20 to 65 MHz Shift clk Support.
  • Up to 227 Mbytes/s Bandwidth.
  • Cable Size is Reduced to Save Cost.
  • 290 mV Swing LVDS Devices for Low EMI.
  • Low Power CMOS Design (< 550 mW typ).
  • Power-Down Mode Saves Power (< 0.25 mW).
  • PLL Requires No External Components.
  • Low Profile 56-lead TSSOP Package.
  • Rising Edge Data Strobe.
  • Compatible with TIA/EIA-644 LVDS Standard.
  • Single Pixel Per Clock XGA (1024 x 768).

📥 Download Datasheet

Datasheet preview – DS90CR583

📁 Similar Datasheet

  • DS90CR583 - LVDS 24-Bit Color Flat Panel Display Link (National Semiconductor)
  • DS90CR581 - LVDS Transmitter 24-Bit Color Flat Panel Display Link (National Semiconductor)
  • DS90CR584 - LVDS 24-Bit Color Flat Panel Display Link (National Semiconductor)
  • DS90CR561 - LVDS 18-Bit Color Flat Panel Display Link (National Semiconductor)
  • DS90CR562 - LVDS 18-Bit Color Flat Panel Display Link (National Semiconductor)
  • DS90CR563 - LVDS 18-Bit Color Flat Panel Display FPD Link (National Semiconductor)
  • DS90CR564 - LVDS 18-Bit Color Flat Panel Display FPD Link (National Semiconductor)
  • DS90CR211 - 21-Bit Channel Link (National Semiconductor)
  • DS90CR212 - 21-Bit Channel Link (National Semiconductor)
  • DS90CR213 - 21-Bit Channel Link (National Semiconductor)
Other Datasheets by Texas Instruments

Full PDF Text Transcription

Click to expand full text
OBSOLETE DS90CR583, DS90CR584 www.ti.com SNLS110B – JULY 1997 – REVISED APRIL 2013 DS90CR583/DS90CR584 LVDS 24-Bit Color Flat Panel Display (FPD) Link— 65 MHz Check for Samples: DS90CR583, DS90CR584 FEATURES 1 •2 20 to 65 MHz Shift clk Support • Up to 227 Mbytes/s Bandwidth • Cable Size is Reduced to Save Cost • 290 mV Swing LVDS Devices for Low EMI • Low Power CMOS Design (< 550 mW typ) • Power-Down Mode Saves Power (< 0.25 mW) • PLL Requires No External Components • Low Profile 56-lead TSSOP Package • Rising Edge Data Strobe • Compatible with TIA/EIA-644 LVDS Standard • Single Pixel Per Clock XGA (1024 x 768) • Supports VGA, SVGA, XGA and Higher • 1.
Published: |