Click to expand full text
DS90LT012A, DS90LV012A
www.ti.com
SNLS141D – AUGUST 2002 – REVISED APRIL 2013
DS90LV012A /DS90LT012A 3V LVDS Single CMOS Differential Line Receiver
Check for Samples: DS90LT012A, DS90LV012A
FEATURES
1
•2 Compatible with ANSI TIA/EIA-644-A Standard • >400 Mbps (200 MHz) switching rates • 100 ps differential skew (typical) • 3.5 ns maximum propagation delay • Integrated line termination resistor (102Ω
typical) • Single 3.3V power supply design (2.7V to 3.6V
range) • Power down high impedance on LVDS inputs • Accepts small swing (350 mV typical)
differential signal levels • LVDS receiver inputs accept
LVDS/BLVDS/LVPECL inputs • Supports open, short and terminated input fail-
safe • Pinout simplifies PCB layout • Low Power Dissipation (10mW typical@ 3.