Texas Instruments FPD87346
The FPD87346 is a timing controller that combines an LVDS single pixel input interface with National's Reduced Swing Differential Signaling (RSDS™) output driver interface for (SVGA) XGA and Wide XGA resolutions. It resides on the TFT-LCD panel and provides the data buffering and control signal generation for (SVGA) XGA, and Wide XGA graphic modes. The RSDS™ path to the column driver contributes toward lowering radiated EMI and reducing system dynamic power consumption.FEATURES
1●2 Reduced Swing Differential Signalling (RSDS™) digital bus reduces dynamic power, EMI and bus width from the timing controller
● LVDS single pixel input interface system
● Input clock range from 40 MHz to 85 MHz
● Drives RSDS™ Column Drivers at 170 Mb/s with an 85 MHz clock (Max.)
● Virtual 8 bit color depth in FRC/Dithering mode
● Single narrow 9-bit differential Source Driver bus minimizes width of Source PCB
● Ability to drive (SVGA) XGA and Wide XGA TFT-LCD Systems
● Failure detect function in DE mode
● CMOS circuitry operates from a 3.0V–3.6V supply
DESCRIPTION
This single RSDS™ bus conveys the 8-bit color data for (SVGA) XGA, and Wide XGA panels at 170 Mb/s when using VESA 60 Hz standard timing. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. System Diagram Figure 1. Block Diagram of the LCD Module 1 Please be a...