Download GC5322 Datasheet PDF
GC5322 page 2
Page 2
GC5322 page 3
Page 3

GC5322 Description

The GC5322 is a wideband digital predistortion transmit processor that includes a digital upconverter (DUC) block, crest factor reduction (CFR) block, feedback (FB) block, digital predistortion (DPD) block, and capture buffer (CB) blocks. The GC5322 is operated in single-antenna mode with shared or individual feedback paths. The GC5322 GPP block receives the interleaved IQ data from the baseband input.

GC5322 Key Features

  • 2 Integrated DUC, CFR, and DPD Solutions
  • 40-MHz (28-Mhz) Signal Bandwidth, Third (Fifth)-Order Expansion BW in DPD Section, Maximum plex Rate 140 Mhz
  • DUC: up to 12 CDMA2000 or TD-SCDMA, 4 W-CDMA, 3-10 MHz or 1-20 MHz OFDMA Carriers
  • CFR: Typically Meets 3GPP TS 25.141 <6.5-dB PAR, <8-dB PAR for OFDMA Signals
  • DPD: Short-Term and Long-Term Memory pensation to 1 µs, Typical ACLR Improvement > 20 dB
  • Single-Antenna TX Mode, Single or Shared Feedback
  • 352-Ball S-PBGA Package, 27-mm × 27-mm
  • 1.2-V Core, 1.8-V HSTL, 3.3-V I/O
  • Typical Power Consumption < 2.5 W
  • Flexible DSP Algorithm Supports Existing and