Texas Instruments LP2996
The LP2996-N and LP2996A linear regulators are designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device also supports DDR2, while LP2996A supports DDR3 and DDR3L VTT bus termination with VDDQ minimum of 1.35 V. The device contains a high-speed operational amplifier to provide excellent response to load transients.| Part No. | LP2996 |
|---|---|
| Datasheet | LP2996 Download |
| Manufacturer |  Texas Instruments |
| Description | Termination Regulator |
| Buy | Stock & Price |
FEATURES
●1 Minimum VDDQ: – 1.8 V (LP2996-N) – 1.35 V (LP2996A)● Source and Sink Current
● Low Output Voltage Offset
● No External Resistors Required for Setting Output Voltage
● Linear Topology
● Suspend to Ram (STR) Functionality
● Stable With Ceramic Capacitors With Appropriate ESR
● Low External Component Count
● Thermal Shutdown 2
APPLICATIONS
● LP2996-N: DDR1 and DDR2 Termination Voltage● LP2996A: DDR1, DDR2, DDR3, and DDR3L Termination Voltage
● FPGA
● Industrial and Medical PC
● SSTL-2 and SSTL-3 Termination
● HSTL Termination 3
DESCRIPTION
The output stage prevents shoot through while delivering 1.5-A continuous current and transient peaks up to 3 A in the application as required for DDR-SDRAM termination. The LP2996-N and LP2996A also incorporate a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs. An additional feature found on the LP2996-N and LP2996A is an active-low shutdown (SD) pin that provides Suspend To RAM (STR) functionality.
