SM320C6701-EP Overview
Key Features
- Hardware Support for IEEE Single-Precision Instructions
- Hardware Support for IEEE Double-Precision Instructions
- 8-Bit Overflow Protection
- Normalization SGUS042A
- MAY 1998 - REVISED APRIL 2004 D 1M-Bit On-Chip SRAM
- 512K-Bit Internal Program/Cache (16K 32-Bit Instructions)
- 512K-Bit Dual-Access Internal Data (64K Bytes) D 32-Bit External Memory Interface (EMIF)
- Glueless Interface to Synchronous Memories: SDRAM and SBSRAM
- Glueless Interface to Asynchronous Memories: SRAM and EPROM
- Access to Entire Memory Map D Two Multichannel Buffered Serial Ports (McBSPs)
