SM320C80 Datasheet PDF

D Single-Chip Parallel Multiple Instruction/Multiple Data (MIMD) Digital Signal Processor (DSP) D More Than Two Billion RISC-Equivalent Operations per Second D Master Processor (MP) -- 32-Bit Reduced Instruction Set Computing (RISC) Processor -- IEEE-754 Floating-Point Capability -- 4K-Byte Instruction Cache -- 4K-Byte Data Cache D Four Parallel Processors (PP) -- 32-Bit Advanced DSPs -- 64-Bit Opcode Provides Many Parallel Operations per Cycle -- 2K-Byte Instruction Cache and 8K-Byte Data RAM per PP D Transfer Controller (TC) -- 64-Bit Data Transfers -- Up to 400 Megabytes per Second (MBps) Transfer Rate -- 32-Bit Addressing -- Direct DRAM/VRAM Interface With Dynamic Bus Sizing -- Intelligent Queuing and Cycle Prioritization D Video Controller (VC) -- Provides Video Timing and Video Random-Access Memory (VRAM) Control -- Dual-Frame Timers for Two Simultaneous Image-Capture and/or Display Systems D Big- or Little-Endian Operation D 50K-Byte On-Chip RAM D 4G-Byte Address Space D 20-ns C...