Download SN54AHCT138 Datasheet PDF
SN54AHCT138 page 2
Page 2
SN54AHCT138 page 3
Page 3

SN54AHCT138 Description

The ’AHCT138 3-line to 8-line decoders/ demultiplexers are designed to be used in highperformance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. (2) The package size (length × width) is a nominal value and includes pins, where applicable (3) The body size (length ×...

SN54AHCT138 Key Features

  • Inputs are TTL-voltage patible
  • Designed specifically for high-speed memory
  • Incorporate three enable inputs to simplify
  • Latch-up performance exceeds 250mA per JESD
  • ESD protection exceeds JESD 22
  • ±2000V human-body model (A114-A)
  • ±1000V charged-device model (C101)