Texas Instruments SN54ALS253
The SN54ALS253 is characterized for operation over the full military temperature range of − 55°C to 125°C. The SN74ALS253 and SN74AS253A are characterized for operation from 0°C to 70°C.| Part No. | SN54ALS253 |
|---|---|
| Datasheet | SN54ALS253 Download |
| Manufacturer |  Texas Instruments |
| Description | Dual 1-of-4 Data Selectors/Multiplexers |
| Buy | Stock & Price |
SN54ALS253, SN74ALS253, SN74AS253A DUAL 1ĆOFĆ4 DATA SELECTORS/MULTIPLEXERS WITH 3ĆSTATE OUTPUTS SDAS216A − APRIL 1982 − REVISED DECEMBER 1994
● 3-State Versions of the ′ALS153 and SN74AS153
● Permits Multiplexing From n Lines to One Line
● Performs Parallel-to-Serial Conversion
● Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs description SN54ALS253 . . . J PACKAGE SN74ALS253, SN74AS253A . . . D OR N PACKAGE (TOP VIEW) 1OE 1 B2 1C3 3 1C2 4 1C1 5 1C0 6 1Y 7 GND 8 16 VCC 15 2OE 14 A 13 2C3 12 2C2 11 2C1 10 2C0 9 2Y These data selectors/multiplexers contain inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two 4-line sections. B 1OE NC VCC 2OE SN54ALS253 . . . FK PACKAGE (TOP VIEW) The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at a high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level.
● 3-State Versions of the ′ALS153 and SN74AS153
● Permits Multiplexing From n Lines to One Line
● Performs Parallel-to-Serial Conversion
● Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs description SN54ALS253 . . . J PACKAGE SN74ALS253, SN74AS253A . . . D OR N PACKAGE (TOP VIEW) 1OE 1 B2 1C3 3 1C2 4 1C1 5 1C0 6 1Y 7 GND 8 16 VCC 15 2OE 14 A 13 2C3 12 2C2 11 2C1 10 2C0 9 2Y These data selectors/multiplexers contain inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two 4-line sections. B 1OE NC VCC 2OE SN54ALS253 . . . FK PACKAGE (TOP VIEW) The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at a high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level.
