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SN54ALVTH32374, SN74ALVTH32374
2.5-V/3.3-V 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SCES280 – SEPTEMBER 1999
D State-of-the-Art Advanced BiCMOS
Technology (ABT) Widebus ™ Design for 2.5-V and 3.3-V Operation and Low Static
Power Dissipation
D Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 2.3-V to
3.6-V VCC )
D Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
D High Drive (–24/24 mA at 2.5-V VCC and
–32/64 mA at 3.3-V VCC)
D Ioff and Power-Up 3-State Support Hot
Insertion
D Use Bus Hold on Data Inputs in Place of
External Pullup/Pulldown Resistors to
Prevent the Bus From Floating
D Auto3-State Eliminates Bus Current
Loading When Output Exceeds VCC + 0.