Download SN54CDC586 Datasheet PDF
SN54CDC586 page 2
Page 2
SN54CDC586 page 3
Page 3

SN54CDC586 Description

The SN54CDC586 is a high-performance, low-skew, low-jitter clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the clock output signals to the clock input (CLKIN) signal. It is specifically designed for use with popular microprocessors operating at speeds from 50 MHz to 100 MHz, or down to 25 MHz on outputs configured as half-frequency outputs.