Datasheet4U Logo Datasheet4U.com

SN54HC132 - Quadruple Positive-NAND Gates

📥 Download Datasheet

General Description

This device contains four independent 2-input NAND gates.

Each gate performs the Boolean function Y = A ● B in positive logic.

Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC132D SOIC (14) 8.65 mm × 3.90 mm SN74HC132DB SSOP (14) 6.20 mm × 5.30 mm SN74HC132N PDIP (14) 19.30 mm × 6.40 mm SN74HC132NS SO (14) 10.20 mm × 5.30 mm SN74HC132PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC132J CDIP (14) 19.94 mm × 7.62 mm SN54HC132W CDIP (14) 9.20 mm × 6.29 mm SN54HC132FK LCCC (20) 8.89 mm × 8.89 mm (1) For all available packages, see the orderable addendum at the end of the data sheet.

Overview

www.ti.com SN74HC132, SN54HC132 SCLS034H – DECEMBER 1S9N827–4HRECV1IS3E2D, SJANN5U4AHRYC2103221 SCLS034H – DECEMBER 1982 – REVISED JANUARY 2021 SNx4HC132 Quadruple 2-Input NAND Gates with Schmitt-Trigger Inputs.

Key Features

  • Buffered inputs.
  • Wide operating temperature range:.
  • 40°C to +85°C.
  • Supports fanout up to 10 LSTTL loads.
  • Significant power reduction compared to LSTTL logic ICs 2.

More Datasheets from Texas Instruments

Part Number Description
SN54HC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SN54HC138J 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SN54HC138W 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SN54HC139 Dual 2-Line To 4-Line Decoders/Demultiplexers
SN54HC10 TRIPLE 3-INPUT POSITIVE-NAND GATES
SN54HC109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
SN54HC10J TRIPLE 3-INPUT POSITIVE-NAND GATES
SN54HC11 Triple 3-Input AND Gates
SN54HC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
SN54HC125 Quadruple Buffers